Complex electronic devices typically require a large number of transistors, large enough that a single integrated circuit may not be able to perform all of the needed (or desired) functions. Accordingly, such devices are typically fabricated from a plurality of integrated circuit chips that are then interconnected via a motherboard or the like, e.g., a hybrid circuit. While the use of flip chips and BGAs (ball grid arrays) are known for simplifying interconnection between the chips (along with wire bonds), such interconnection techniques can use up valuable and sometimes limited internal package volume. For example, U.S. Pat. Nos. 6,164,284; 6,185,452; 6,208,894; 6,315,721; and 6,472,991; and copending, commonly-assigned U.S. patent application Ser. Nos. 09/677,384; 10/205,862; and 10/280,841 describe implantable medical devices and enclosed circuitry that are sized so that they are suitable for injection in a patient's body, i.e., being contained within an elongated housing having an axial dimension of less than 60 mm and a lateral dimension of less than 6 mm. With such limited outer dimensions (and accordingly even smaller inner dimensions), the space available for needed circuitry is limited. Accordingly, various forms of stacking (sometimes referred to as 3D or vertical integration) techniques have been proposed. Typically, such techniques require a frame (see, e.g., U.S. Pat. No. 6,404,043), interconnect paths at the edge of uniformly sized chips and/or carriers (see, e.g., U.S. Pat. No. 4,956,694), or additional vertical interconnect members and/or wire bond interconnects (see, e.g., U.S. Pat. No. 6,133,626) to extend the assembly beyond two oppositely oriented flip chips, i.e., with one chip facing “up” and the other chip facing “down” so that their BGAs can mate to each other. It is believed that each of these techniques limit the use of valuable package volume.